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Pull requests: llvm/circt

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163 Open 6,331 Closed
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Pull requests list

Create .git-blame-ignore-revs
#8787 opened Jul 26, 2025 by jpienaar Loading…
1
[ESI] Better single-argument handling for FunctionPort
#8782 opened Jul 25, 2025 by mortbopet Loading…
[ESI] Expose accelerator through AcceleratorConnection py api
#8781 opened Jul 25, 2025 by mortbopet Loading…
[ESI] Also publish releases on workflow_dispatch
#8780 opened Jul 25, 2025 by mortbopet Loading…
[SV][ETC] Quick fix for extraction involving $signed/$unsigned.
#8775 opened Jul 24, 2025 by dtzSiFive • Draft
1
1
[HWToLLVM] Add lowering support for 'hw.array_inject' op
#8774 opened Jul 24, 2025 by mvpant Loading…
13
[Comb] Add comb.reverse operation with Verilog Export
#8758 opened Jul 21, 2025 by mafeguimaraes Loading…
27
Add check for casting bundle with elements in different directions
#8750 opened Jul 21, 2025 by unlsycn Loading…
1
Inline input-only modules
#8739 opened Jul 18, 2025 by rwy7 • Draft
1
[hw] Add container op
#8704 opened Jul 14, 2025 by seldridge Loading…
2
Remove single state restriction on FSM to SV
#8665 opened Jul 8, 2025 by jpienaar Loading…
1
Allow Bound-in layers under inline layers FIRRTL Involving the `firrtl` dialect
#8642 opened Jul 2, 2025 by rwy7 • Draft
[FIRRTL][CreateSiFiveMetadata] Add memory read-under-write behavior to emitted metadata
#8604 opened Jun 26, 2025 by fzi-hielscher Loading…
20
[ImportVerilog][CAPI] Add interfaces to allow external use
#8563 opened Jun 13, 2025 by SpriteOvO • Draft
3
[ESI] Extend instead of override CMAKE_CXX_FLAGS
#8551 opened Jun 10, 2025 by mortbopet Loading…
6
[hw] Add hw.donttouch operation
#8547 opened Jun 9, 2025 by seldridge Loading…
13
[CMake] Allow Python discovery from virtual environment
#8520 opened May 30, 2025 by hamidelmaazouz Loading…
5
[SharedResourcesProblem] [Simplex Scheduler] Simplex scheduler deals with multiple resource constraints
#8480 opened May 13, 2025 by jiahanxie353 Loading…
3
[SCFToCalyx] Modify top-level function in place and propagate external memory allocations
#8446 opened Apr 25, 2025 by jiahanxie353 Loading…
[ci] Bump CI images
#8445 opened Apr 25, 2025 by seldridge Loading…
3
[ImportVerilog] Convert the unpacked array to a simple bit vector
#8392 opened Apr 4, 2025 by AnnuCode Loading…
2
When replacing a register with its reset value, attempt width coercion FIRRTL Involving the `firrtl` dialect
#8379 opened Apr 1, 2025 by rwy7 Loading…
[ImportVerilog]add support for String literal operations
#8309 opened Mar 10, 2025 by ChenXo0 • Draft
2
Add a few mux-of-const and reg-of-and/or canonicalizers. FIRRTL Involving the `firrtl` dialect
#8307 opened Mar 7, 2025 by rwy7 Loading…
18
[circt-verilog-lsp] Add hover support
#8304 opened Mar 6, 2025 by uenoku Loading…
4
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