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Remove unused variable #149115

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Merged
merged 1 commit into from
Jul 16, 2025
Merged

Remove unused variable #149115

merged 1 commit into from
Jul 16, 2025

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spavloff
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@spavloff spavloff self-assigned this Jul 16, 2025
@llvmbot
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llvmbot commented Jul 16, 2025

@llvm/pr-subscribers-backend-risc-v

Author: Serge Pavlov (spavloff)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/149115.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (-1)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 0cee5c87e999d..4845a9c84e01f 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14017,7 +14017,6 @@ const uint32_t ModeMask32 = ~RISCVExceptFlags::ALL;
 SDValue RISCVTargetLowering::lowerGET_FPMODE(SDValue Op,
                                              SelectionDAG &DAG) const {
   const MVT XLenVT = Subtarget.getXLenVT();
-  const uint64_t ModeMaskValue = Subtarget.is64Bit() ? ModeMask64 : ModeMask32;
   SDLoc DL(Op);
   SDValue Chain = Op->getOperand(0);
   SDValue SysRegNo = DAG.getTargetConstant(RISCVSysReg::fcsr, DL, XLenVT);

@durin42
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durin42 commented Jul 16, 2025

Thanks!

@durin42 durin42 merged commit 372e999 into llvm:main Jul 16, 2025
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3 participants