Add initial support for powerpc64le initialization. #267
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* Adds header definitions for PPC64le
* Adds support to construct the processor, core, cluster, package
and cache(L1i,L1d,L2 and L3) information reported by the system.
Test: Build and ran cpu_info on PPC64le linux machine. confirmed
that it properly reports the logical processors, cores, clusters,
packages and cache information.
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@malfet could you review the patch again |
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Hi @malfet , Did you get a chance to review this patch? |
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@malfet I am waiting for your review. |
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@fbarchard @malfet can you review this. |
preprocessor code will never be compiled.
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I have updated the code. Please review it @malfet |
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@malfet can you review the latest code. |
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Pull Request Overview
This PR adds initial support for powerpc64le initialization including new header definitions, architectural decoding logic, and test coverage for POWER-specific features.
- Adds new cases to uarch-to-string conversion to support POWER7, POWER8, POWER9, and POWER10.
- Introduces PPC64-specific processing flows in CPU parsing, cache handling, and initialization.
- Updates configuration and test infrastructure to integrate PPC64 support.
Reviewed Changes
Copilot reviewed 18 out of 19 changed files in this pull request and generated no comments.
Show a summary per file
| File | Description |
|---|---|
| tools/cpu-info.c | New POWER architecture cases added in the uarch_to_string function. |
| test/name/power-features.cc | Added tests for POWER-specific features based on auxiliary vector flags. |
| test/init.cc | Conditionals to disable cache consistency tests for PPC64 are added. |
| src/powerpc/uarch.c, linux/ppc64-isa.c, linux/ppc64-hw.c | New implementations for decoding vendor, ISA, and hardware capabilities on PPC64. |
| src/powerpc/linux/cpuinfo.c | CPU parsing updated to support POWER processor architectures with proper logging. |
| src/powerpc/cache.c | New implementation for decoding cache information for PPC processors. |
| src/linux/processors.c & src/linux/api.h | Added functions to get processor online status on Linux. |
| src/init.c, internal-api.h, src/api.c | Updated PPC64 branches added to initialization and global data. |
| include/cpuinfo.h | Added PPC-specific fields and inline feature functions. |
| configure.py | Configures PPC64-specific source files and tests for build targets. |
Files not reviewed (1)
- CMakeLists.txt: Language not supported
The 'disabled' field was declared for configurations other than SMT8
mode, but it is already handled during PowerPC64 Linux system
initialization. This change removes the redundant code.
make test:
Start 1: init-test
1/3 Test pytorch#1: init-test ........................ Passed 0.02 sec
Start 2: get-current-test
2/3 Test pytorch#2: get-current-test ................. Passed 0.02 sec
Start 3: power-features-test
3/3 Test pytorch#3: power-features-test .............. Passed 0.02 sec
100% tests passed, 0 tests failed out of 3
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| goto unknown; | ||
| } | ||
| break; | ||
| case 5: |
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Can we add a break statement for case 5, 7, 8?
src/powerpc/linux/cpuinfo.c
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| if (memcmp(line_start, "clock", key_length) == 0) { | ||
| parse_cpu_architecture(value_start, value_end, processor); | ||
| } else { | ||
| goto unknown; |
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Can we avoid using goto's for logging.
src/powerpc/linux/init.c
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| /* Asiigning linux_id's for all the online processors in consecutive manner. | ||
| * This is only needed in other than SMT8 modes. | ||
| */ | ||
| if (smt !=8) |
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For SMT mode otherthan 8, the Linux IDs should not be continuous.
Ex: In SMT8, Linux Ids for a core. : 0,1,2,3,4,5,6,7
Linux Ids for two cores : 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
In SMT4, Linux Ids for single core: 0,1,2,3,-,-,-,-
Linux Ids for two cores : 0,1,2,3,-,-,-,-,8,9,10,11,-,-,-,-
Similarly for SMT2 and SMT off.
src/powerpc/linux/init.c
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| } | ||
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| uint32_t l1i_index = UINT32_MAX, l1d_index = UINT32_MAX, l2_index = UINT32_MAX, l3_index = UINT32_MAX; | ||
| for (uint32_t i = 0; i < valid_processors_count; i++) { |
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For SMT=off, where we have only single hardware thread (valid_processor_count) active but two cache instances present per core, this leads to mismatch while mapping cache instances to logical processors. Instead, iterate over cache instances and map to the logical processors.
| struct cpuinfo_cache* l1d = NULL; | ||
| struct cpuinfo_cache* l2 = NULL; | ||
| struct cpuinfo_cache* l3 = NULL; | ||
| struct cpuinfo_cache* l4 = NULL; |
| case 10: /* POWER10 */ | ||
| processor->core.uarch = cpuinfo_uarch_power10; | ||
| break; | ||
| default: |
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Add support for Power11 and deprecate Power7.
| case cpuinfo_uarch_power9: | ||
| return "POWER9"; | ||
| case cpuinfo_uarch_power10: | ||
| return "POWER10"; |
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Add Power11 support and deprecate Power7.
test/name/power-features.cc
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| int a = mock_hwcap; | ||
| #else | ||
| int a = (uint32_t) getauxval(AT_HWCAP); | ||
| int b = (uint32_t) getauxval(AT_HWCAP2); |
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Rename 'b' to be more meaningful name to reflect its purpose. If 'a' is not used , we can delete initializing 'a'.
Added header definitions for PPC64LE.
Implemented support to construct and report processor topology information including processor, core, cluster, package, PVR, and cache levels (L1i, L1d, L2, and L3).
Test:
Built and executed cpu_info on a PPC64LE Linux machine. Confirmed that it accurately reports logical processors, cores, clusters, packages, and cache information.
Ran unit tests and verified that there were no regressions.