RISC-V CPU Design using TL-Verilog in Makerchip IDE - RV32I
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Feb 4, 2023 - Verilog
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embedded-c
Here are 7 public repositories matching this topic...
Design of a Customizable RISC-V SoC for Clapswitch Application
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Jun 6, 2025 - Verilog
Display of various animated digital and analog clock using VGA control in FPGA
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May 23, 2018 - Verilog
This is a space for all code elements of my portfolio. These projects are from several classes over multiple semesters at Iowa State.
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Jul 30, 2024 - Verilog
This project involves configuring a NIOS II softcore processor on the Altera DE10-Lite FPGA using Quartus Prime. It includes the creation of a custom Board Support Package (BSP), hardware abstraction layer (HAL), and drivers to optimize processor performance.
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Nov 19, 2024 - Verilog
Implementation of UART communication in C and Verilog
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Dec 24, 2024 - Verilog
NIOS II controlled hardware ODE solver implemented on Cyclone IV FPGA
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Oct 10, 2022 - Verilog
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