[AVR] Changed data_layout

[tomtor]

This change is required when

llvm/llvm-project@97f0ff0

gets included in the Rust llvm tree, because it changes the AVR data-layout

[rustbot]

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[rustbot]

These commits modify compiler targets.
(See the Target Tier Policy.)

[tomtor]

@Patryk27 FYI

[nikic]

You need to adjust the datalayout in

rust/compiler/rustc_codegen_llvm/src/context.rs

Lines 176 to 215 in a6620a4

	if llvm_version < (20, 0, 0) {
	if sess.target.arch == "aarch64" || sess.target.arch.starts_with("arm64") {
	// LLVM 20 defines three additional address spaces for alternate
	// pointer kinds used in Windows.
	// See https://github.com/llvm/llvm-project/pull/111879
	target_data_layout =
	target_data_layout.replace("-p270:32:32-p271:32:32-p272:64:64", "");
	}
	if sess.target.arch.starts_with("sparc") {
	// LLVM 20 updates the sparc layout to correctly align 128 bit integers to 128 bit.
	// See https://github.com/llvm/llvm-project/pull/106951
	target_data_layout = target_data_layout.replace("-i128:128", "");
	}
	if sess.target.arch.starts_with("mips64") {
	// LLVM 20 updates the mips64 layout to correctly align 128 bit integers to 128 bit.
	// See https://github.com/llvm/llvm-project/pull/112084
	target_data_layout = target_data_layout.replace("-i128:128", "");
	}
	if sess.target.arch.starts_with("powerpc64") {
	// LLVM 20 updates the powerpc64 layout to correctly align 128 bit integers to 128 bit.
	// See https://github.com/llvm/llvm-project/pull/118004
	target_data_layout = target_data_layout.replace("-i128:128", "");
	}
	if sess.target.arch.starts_with("wasm32") || sess.target.arch.starts_with("wasm64") {
	// LLVM 20 updates the wasm(32|64) layout to correctly align 128 bit integers to 128 bit.
	// See https://github.com/llvm/llvm-project/pull/119204
	target_data_layout = target_data_layout.replace("-i128:128", "");
	}
	}
	if llvm_version < (21, 0, 0) {
	if sess.target.arch == "nvptx64" {
	// LLVM 21 updated the default layout on nvptx: https://github.com/llvm/llvm-project/pull/124961
	target_data_layout = target_data_layout.replace("e-p6:32:32-i64", "e-i64");
	}
	if sess.target.arch == "amdgpu" {
	// LLVM 21 adds the address width for address space 8.
	// See https://github.com/llvm/llvm-project/pull/139419
	target_data_layout = target_data_layout.replace("p8:128:128:128:48", "p8:128:128")
	}
	}

for old LLVM versions.

[tomtor]

@nikic Would the version with the matching LLVM be 21.2.0, because it missed 21.1 from aug 1th ?

[nikic]

@nikic Would the version with the matching LLVM be 21.2.0, because it missed 21.1 from aug 1th ?

The version should be 22.0.0.

[nikic]

Blocked on llvm/llvm-project#153010.

[fee1-dead]

r? nikic

[nikic]

LGTM, can you please squash the commits?

[nikic]

@bors r+ rollup

[bors]

📌 Commit 2563e4a has been approved by nikic

It is now in the queue for this repository.